FPGA Interface between Simulink/Matlab und Labview

[42na]

Hai Houssa,
i don't white exactly what you want to realize, anyhow I currently on the same thesis as well
Please give me more hints about what he/she is trying to perform/implement.  Does she/he has a subsystem with input/output nodes? Does she/he know the normal way to configure the SIT dll to run on an RT aim.
Fourtwona

[befaiz]

Hello FourtwonaFirst  thanks for your answer and your interest, I try to explain what i want to realize. I have a Model in Simulink, I can this Model connect in LabVIEW with simulation interface toolkit,  and with SIT Connection manager the hardware I/O as Model I/O  configure.  
I would like to make the I/O interfaces of a FPGA 7813R PXI system from Simulink accessible. Similarly as with dSPACE RTI block, I can access the I/O from Simulink means over S Function Block. for example Analog Input.
Also I want to define the I/O of the Model as FPGA I/O  in Simulink and then can I build the ModelDLL  in Matlab and in SIT download. finally run  the Model-simulation on RT Target.
I think, we need access to the visa server. I am on the search for this concept.
Perhaps you or someone can support me.
My Regards and thanks
HooSSa
 
 

[befaiz]

Hi,
Yes, I thought of the LV simulation, but it will not help me, because the Model can only with Simulink
 
HouSSa

[Christian_M]

Hi befaiz,
If you want to work with a 7813R FPGA card, i would recommend to use LabVIEW FPGA instead of simulink. If not, so just using simulink, you will need to build a driver as a set of VIs to perform the communication between FPGA and host system, which means building a VI for the FPGA, one for the host, build a dll out of this and use it in simulink.
Another solution, but without using the FPGA would be: <a href="http://zone.ni.com/devzone/cda/tut/p/id/3005#toc0" target="_blank"> http://zone.ni.com/devzone/cda/tut/p/id/3005#toc0</a>
Christian

[befaiz]

Hallo Christian,
I use Labview PPGA for the Fpga programming, but my problem, I wants to access to this programmed FPGA I/O from Simulink, as blockset, so&nbsp;can define I/O in Simulink (to only define in Simulink, Fpga programming is in LabVIEW FPGA). I want just to call&nbsp;I/O&nbsp; from Simulink.
MfG
HouSSa

[befaiz]

I developed the simulation with SIT, but&nbsp;I want define&nbsp;the HardwareI/O not only&nbsp;in Connection manager but also in Simulink with Blockset similar as NI SignalProbe Block also for I/O (A I/O, DI/O) of FPGA&nbsp;.similar&nbsp; as RTI dspace,
&nbsp;I use the Sofware: Labview Prof 8.1,Labview FPGA ,Labview RT,SIT and Matlab/Simulink with RTW.

Thanks for your Support

[befaiz]

I&nbsp;think you understand what I need, but which DLL I must&nbsp; to build,&nbsp; of the complete Labview code or only&nbsp;of code (Connection manager VI = Conn manager Floting.vi).
Note: Build DLL of Conn manager Floting.vi is not possible, there is&nbsp; from NI is inaccessible.
thinks
HouSSa